The present invention relates in general to integrated circuits using field effect transistor (FET) technology, and in particular to a CMOS operational amplifier with constant gain.
The gain of a conventional CMOS operation amplifier is determined in part by the ratio of the transconductances of MOS transistors in its input stage. For example, FIG. 1 shows a simplified schematic for a typical input stage of a CMOS operational amplifier. The gain for this stage is approximately equal to the ratio of the transconductance of transistor Q1 (gm1) to the transconductance of transistor Q2 (gm2), or gm1/gm2. The transconductance of an MOS transistor is given by: .sqroot..mu.CoxI.sub.D (W/L), where, .mu. is the mobility of the transistor, Cox is its channel oxide capacitance, I.sub.D is the drain current, and (W/L) is the ratio of the width to length of the channel. The drain current I.sub.D and Cox are the same for both transistors Q1 and Q2. Thus, the gain of this amplifier is determined by the ratio of the mobility of the p-channel transistor Q1 (.mu..sub.p) to that of the n-channel transistor Q2 (.mu..sub.n), and the ratio of transistor channel sizes. Because the mobility of the MOS transistor changes with process and temperature variations, the gain of the conventional operational amplifier shown in FIG. 1 becomes quite dependent on process and temperature variations. Further, the fact that .mu..sub.n is approximately three times as much as .mu..sub.p, adversely affects the gain of the amplifier. To increase the gain of the amplifier, transistor Q1 must be made much larger than transistor Q2 which can be costly in terms of circuit area.
There is a need for efficiently-implemented operational amplifiers that exhibit relatively constant gain over process and temperature variations.